bit 源码搜索结果, 第96页, Verysource

lab7.rar 在這個實習當中，我們學習利用 Hierarchical VHDL code 的方式，來實現一個n-bit 的ripple-carry adder，並學習使用package。
counter.zip this is the 1 bit counter clock where the counter increase by 1 on rising edge clock
counter4bit.zip 4 bit fpga code for beginner
fulladder.zip single bit full adder
halfadder.zip single bit half adder
16bit_pipeline.zip 16 bit pipeline design by vhdl.
Fpgamemtest.rar 这个是用vhdl语言描写的关于测试FPGA内存的代码。用reset复位，包括.vhdl .ucf .bit文件。我只上传了这3个最重要的。
nist.zip Random and pseudorandom bit generators (RBGs, PRBGs) are used for many purposes including cryptographic, modeling, and simulation applications. For cryptographic purpose, they are required in the construction of encryption keys, other cryptographic ...
sts-2.0b.zip Random and pseudorandom bit generators (RBGs, PRBGs) are used for many purposes including cryptographic, modeling, and simulation applications. For cryptographic purpose, they are required in the construction of encryption keys, other cryptographic ...
err_diff_mathCAD.rar error diffusion algorithm in MathCAD 8-bit integer data type, +test image