A Threshold Control Technique for CMOS Comparator Design - 源码 - 源码 - 免费下载

A Threshold Control Technique for CMOS Comparator Design

文件大小： 264k

源码售价： 10 个金币积分规则积分充值

资源说明：Area and power efficiency of ADC can benefit from the threshold configurable comparator based SAR ADC architecture. This work proposes a threshold control technique for CMOS comparator design with high linearity. One pair of binary weighted pMOS capacitor arrays is used to generate the built-in threshold levels; another pair of digitally switched pMOS capacitor arrays is implemented to compensate the nonlinearity for the generated threshold levels.

部分文件列表（点击文件名可查看文件内容）

					
									本源码包内暂不包含可直接显示的源代码文件，请下载源码包。