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LED.rar
利用纯寄存器的操作来使LED等闪亮，系统时钟由8M的晶振（HSE）经2倍频后，由PLL输出，希望初学者可以共勉。
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Nl-diystem.rar
新型全数字锁相环在无功补偿系统中的应用New all-digital PLL in reactive power compensation system
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hc4046_pll_calc.zip
Example of calculating PLL factors and component values for 74HC4046 chip. Based on a Texas Instruments application note, fixed and converted to Python.
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EKSTM3210_v5_examples.zip
... (2010-01-27 09:23:15)转载标签：杂谈 分类：嵌入式
在STM32中，有五个时钟源，为HSI、HSE、LSI、LSE、PLL。
①、HSI是高速内部时钟 8M，RC振荡器，频率为8MHz。
②、HSE是高速外部时钟，可接石英/陶瓷谐振器，或者 ...
③、LSI是低速内部时钟，RC振荡器，频率为40kHz。
④、LSE是低速外部时钟，接频率为32.768kHz的石英晶体。
⑤、PLL为锁相环倍频输出，其时钟输入源可选择为HSI/2、
HSE或者HSE/2。倍频可选择为2~16倍， ...
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Template.rar
C8051F120的串口通信，有命令格式，有超时检测，有校验和功能，使用了PLL提升了系统频率。经过测试。有端口和使用说明文件，工程文件完整，移植方便。使用下面的功能：UART RS232 PLL GPIO Timer
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pll_system_simulation_6467.rar
A simulation of PLL using MS EXCEL..... very handy
contains 3rd order as well as 4th order PLL simulations and is presented in a very easy to understand manner.
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pll_8348.rar
... the simulink files (*.mdl) which are block design
files of various communication systems such as AM, DSB-SC, FM, PLL, Data Acquisition, Digital
Data Transmission, PCM and Delta Modulation.
The idea here is to implement experiments of a traditional ...
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